In various semiconductor devices such as Organic Light Emitting Diodes (OLEDs) and Photovoltaic Devices (PVs), light management is a very critical aspect substantially affecting the efficiency of such devices. In OLEDs, the difference in refractive indices of ambient medium, substrate and deposited semiconductor layers can significantly reduce the percentage of generated light that can be extracted. Similarly in a PV device, light trapping is a major factor affecting its efficiency by increasing a path of light in the PV device thereby increasing its absorption. Therefore, lacquer layers with light management textures are added to such devices at the interfaces between different refractive index materials. For example, an OLED may have a light extraction texture on a lacquer layer deposited between the semiconductor layers and the substrate, and a PV device may also have light trapping texture on a lacquer layer deposited between the semiconductor layers and the substrate.
Although presence of lacquer is desirable for light trapping or light extraction at active areas of devices, i.e., semiconductor layers, its presence is highly undesirable at areas where substrate and an encapsulate join, and at areas where electrical contact tracks are deposited on the semiconductor layers. Any presence of lacquer in these areas may cause delamination or ingression of water or air through lacquer, causing corrosion and adversely hampering normal operation of device (OLED or PV device). In a worst case this may significantly reduce the lifetime of the device.
Currently, there are various methods to deposit the lacquer layers. In the current methods, the lacquer layer is deposited on the whole surface of the semiconductor layers or the substrates by spin coating, doctored blade, spray coating, screen printing, sputtering, glass mastering, photoresist mastering, electroforming, or chemical vapor deposition. Thereafter, the lacquer material is removed from the areas for electrical contacts and encapsulation contacts by etching or scribing.
However, these methods enable application of lacquer on the whole surface, followed by its removal from non-active areas. Accordingly, a significant amount of lacquer material that is removed gets wasted. Also, while removing the unwanted areas of the lacquer layer, the semiconductor or the substrate layer beneath the lacquer layer may get affected. For example, the substrate may also get scribed while scribing the lacquer layer.
Further, some particles of the scribed lacquer layer may get deposited again on the semiconductor layers or the substrate while scribing itself. Additionally, such methods may not be suitable for non-planar complex shapes. In light of the above discussion, there is a need for a method for deposition of lacquer.
Those with ordinary skill in the art will appreciate that the elements in the figures are illustrated for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated, relative to other elements, in order to improve the understanding of the present invention.
There may be additional structures described in the foregoing application that are not depicted on one of the described drawings. In the event such a structure is described, but not depicted in a drawing, the absence of such a drawing should not be considered as an omission of such design from the specification.